GitHub - cnlohr/mini-rv32ima: A tiny C header-only risc-v emulator.
mini-rv32ima is a single-file-header, mini-rv32ima.h, in the STB Style library that: Implements a RISC-V rv32ima/Zifencei†+Zicsr (and partial su), with CLINT and MMIO. Is about 400 lines of actual code. Has no dependencies, not even libc. Is easily extensible. So you can easily add CSRs, instructions, MMIO, etc! Is pretty performant. (~450 coremark on my laptop, about 1/2 the speed of QEMU) Is hum
Renode
Renode is an open source software development framework with commercial support from Antmicro that lets you develop, debug and test multi-node device systems reliably, scalably and effectively. Renode strengths full determinism of execution, shared virtual time transparent & robust debugging, tracing, analysis, even in multi-node setups easy integration with your everyday tools, plugins rich model
NES On RISC-V
RISC architecture might change the world, but it runs an NES emulator right now. That’s thanks to MaixPy, the new MicroPython for the K210, the recently released RISC-V microcontroller that’s making waves in the community. [Robot Zero One] has the tutorial and [Other Dave] of EEVBlog has a video of the thing in action. The Sipeed K210 came to the English-speaking world in the form of a weird pre-o
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GitHub - tvlad1234/linux-ch32v003: Linux on a $0.15 RISC-V microcontroller
GitHub - takahirox/riscv-rust: RISC-V processor emulator written in Rust+WASM
